1. Technical Field
The present invention generally relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit and a data read method.
2. Related Art
In general, a semiconductor integrated circuit, or particularly, a nonvolatile memory apparatus, includes a memory controller that controls data to be programmed into or read from a memory cell of a memory cell area. The memory cell area of the semiconductor integrated circuit includes a plurality of strings, and each of the strings includes select transistors formed at both ends of memory cells coupled in series to each other. Memory cells formed in different strings are electrically coupled through a word line. Furthermore, each of the strings is electrically coupled to a page buffer configured to sense data through a bit line.
In order to store data in a memory cell, a program operation and a verification operation are repeated to a preset number until data temporarily stored in a page buffer is programmed in a selected memory cell. The verification operation is to verify whether or not a threshold voltage of the selected memory cell is programmed at a specific level or more. For this verification operation, the memory controller of the semiconductor integrated circuit sets and stores a program verification level for each word line according to the characteristic of the word line and program cycling.
FIG. 1 is a flow chart showing a data read process of a conventional semiconductor integrated circuit.
Referring to FIG. 1, when a program command is inputted at step S110, the conventional semiconductor integrated circuit reads a program verification level stored for each word line from a memory controller at step S120, and performs a program operation of a memory block selected from a memory area at step S130.
Then, when a read command is inputted at step S140, the semiconductor integrated circuit reads the stored read level from the memory controller at step S150, and reads data from the memory region based on the read level at step S160.
Then, the semiconductor integrated circuit performs an error correction code (ECC) operation at step S170 to determine whether the ECC operation was successful. When the ECC operation is successful, the data read operation is completed. When the ECC operation is unsuccessful, the semiconductor integrated circuit resets the read level at step S180, and reads data based on the reset the read level from step S160.
In the conventional semiconductor integrated circuit, however, the program verification level and the read level are set for each word line, but are not set for each memory block. Therefore, there are difficulties in resetting the read level of the semiconductor integrated circuit which performs a program or read operation for each memory block.